Boolean Algebra Calculator

Last updated: April 5, 2026

The Boolean Algebra Calculator simplifies Boolean expressions, generates truth tables, and converts between SOP and POS forms. Enter any expression with AND, OR, NOT, XOR, and NAND operations to get the simplified form, Karnaugh map, and full truth table — the foundation of digital logic.

Calculator

Input A

Input B

Results

AND

XOR

NOT A

NOT B

NAND

NOR

XNOR

Number of True Inputs

Results

AND

XOR

NOT A

NOT B

NAND

NOR

XNOR

Number of True Inputs

Boolean algebra is the mathematics of true/false logic — and it underlies every digital circuit, computer processor, database query, and programming conditional that has ever been built. Simplifying a Boolean expression reduces the number of logic gates in a circuit, directly reducing cost, power consumption, and propagation delay. The Boolean algebra calculator applies Boolean identities and Karnaugh map simplification automatically.

Boolean Operations and Truth Tables

The fundamental operations:

AND (·): output 1 only when both inputs are 1
OR (+): output 1 when at least one input is 1
NOT ('): inverts the input (0→1, 1→0)
XOR (⊕): output 1 when inputs differ
NAND (↑): NOT AND — output 0 only when both inputs are 1
NOR (↓): NOT OR — output 1 only when both inputs are 0

Key Boolean identities: A·A' = 0 (complement law); A+A' = 1; A·1 = A; A·0 = 0; A+0 = A; A+1 = 1; A+AB = A (absorption); A(A+B) = A; A+A'B = A+B (redundancy). De Morgan's theorem: (A·B)' = A'+B'; (A+B)' = A'·B'. Use this online calculator to simplify any expression.

Karnaugh Map Simplification

A Karnaugh map (K-map) is a visual method for minimizing Boolean expressions by grouping adjacent 1s in a grid of 2ⁿ cells (n = number of variables). Rules: groups must contain 2ⁿ cells (1, 2, 4, 8, 16); groups should be as large as possible; groups may wrap around the edges; cover every 1 at least once; the simplified expression is the OR of each group's simplified AND term. For a 2-variable K-map with 4 cells; a 3-variable map has 8 cells; a 4-variable map has 16 cells. K-maps provide the minimum SOP (sum of products) expression, which directly maps to a two-level AND-OR gate implementation.

Applications in Digital Logic Design

Boolean simplification is the foundation of: combinational logic circuit design (adders, multiplexers, decoders); sequential logic (flip-flops, registers, state machines); FPGA programming (mapping logic to look-up tables); compiler optimization (short-circuit evaluation, dead code elimination); database queries (WHERE clause optimization); hardware description languages (VHDL, Verilog). The advanced mathematics calculators cover the complete discrete mathematics toolkit.

Visual Analysis

How It Works

Enter a Boolean expression using variables (A, B, C, D), operators (AND/·, OR/+, NOT/', XOR/⊕), and parentheses. The calculator: (1) parses the expression; (2) generates the complete truth table for all variable combinations; (3) identifies minterms (inputs that produce output 1); (4) applies Karnaugh map grouping or Quine-McCluskey algorithm; (5) outputs minimized SOP and POS expressions; (6) displays canonical sum of minterms (Σm) notation.

Understanding Your Results

Each output is either 0 (false) or 1 (true). Notice the relationships: NAND is always the opposite of AND; NOR is always the opposite of OR. XOR equals 1 exactly when the inputs are different. With A=1, B=1: AND=1, OR=1, XOR=0, NAND=0, NOR=0. With A=1, B=0: AND=0, OR=1, XOR=1, NAND=1, NOR=0. Toggle through all four combinations to construct the complete truth table mentally.

Worked Examples

Both True (A=1, B=1)

Inputs

Results

and result1

or result1

xor result0

not a0

nand result0

nor result0

When both inputs are true: AND=1 (both true), OR=1 (at least one true), XOR=0 (inputs match), NOT A=0, NAND=0 (inverted AND), NOR=0 (inverted OR).

One True (A=1, B=0)

Inputs

Results

and result0

or result1

xor result1

not a0

nand result1

nor result0

When inputs differ: AND=0 (not both true), OR=1 (at least one true), XOR=1 (inputs differ), NAND=1 (inverted AND=0), NOR=0 (inverted OR=1).

Frequently Asked Questions

Boolean expressions can be simplified using: Boolean identities (algebraic manipulation) — apply identities like De Morgan's theorem, absorption, and distribution laws step by step; Karnaugh maps (K-maps) — plot the truth table onto a grid, group adjacent 1s in powers of 2, read off the simplified terms; Quine-McCluskey algorithm — a tabular method suitable for computer implementation, used for 5+ variable expressions where K-maps become impractical. The simplest approach for 3–4 variables: use a K-map. For complex expressions with many variables: use Boolean algebra software. Example: simplifying AB' + AB + A'B: = A(B' + B) + A'B = A·1 + A'B = A + A'B = A + B (absorption theorem).

De Morgan's theorems allow conversion between NAND/NOR and AND/OR logic: First theorem: (A · B)' = A' + B' — the complement of a product equals the sum of complements. Second theorem: (A + B)' = A' · B' — the complement of a sum equals the product of complements. These are among the most useful theorems in Boolean algebra because: they allow any logic function to be implemented entirely with NAND gates (NAND is a functionally complete set); they are essential for converting between SOP and POS forms; they are used in digital circuit simplification and verification. Intuition: 'NOT(A AND B)' means 'at least one of A, B is false' — which is exactly 'NOT-A OR NOT-B'. Extended De Morgan: (A·B·C)' = A'+B'+C'; (A+B+C)' = A'·B'·C'.

A Karnaugh map (K-map) is a grid method for Boolean minimization. For n variables, the K-map has 2ⁿ cells arranged so that adjacent cells (including wrap-around at edges) differ in only one variable (Gray code ordering). Steps: (1) plot 1s in the cells corresponding to minterms where output = 1; (2) group adjacent 1s into rectangular groups of 1, 2, 4, 8, or 16 (must be powers of 2); (3) make each group as large as possible (larger groups give simpler terms); (4) cover all 1s with groups (may overlap); (5) each group gives one AND term (variables constant in that group); (6) OR all the AND terms for the final expression. Example: 4-variable K-map with 1s at positions 0, 1, 3, 2 (top row) — all four are a group of 4, giving the simplified expression AB (or whatever the constant variables are).

Sum of Products (SOP) is a Boolean expression written as OR of AND terms (products): F = ABC' + A'B + AC. Each term is a product (AND); the expression is their sum (OR). SOP directly maps to a two-level AND-OR gate circuit. Product of Sums (POS) is a Boolean expression written as AND of OR terms (sums): F = (A+B')(B+C)(A'+C'). Each term is a sum (OR); the expression is their product (AND). POS directly maps to a two-level OR-AND gate circuit. Canonical SOP uses minterms (all variables appear in each term); canonical POS uses maxterms. K-maps produce minimum SOP by grouping 1s; they produce minimum POS by grouping 0s. In NAND-gate-only implementations, SOP is typically preferred; in NOR-gate-only implementations, POS is preferred.

Essential Boolean identities: Identity laws: A+0=A; A·1=A. Null laws: A+1=1; A·0=0. Idempotent: A+A=A; A·A=A. Complement: A+A'=1; A·A'=0. Double negation: (A')'=A. Commutative: A+B=B+A; A·B=B·A. Associative: A+(B+C)=(A+B)+C. Distributive: A(B+C)=AB+AC; A+BC=(A+B)(A+C). Absorption: A+AB=A; A(A+B)=A. De Morgan: (AB)'=A'+B'; (A+B)'=A'·B'. Consensus: AB+A'C+BC=AB+A'C (BC is redundant). XOR identities: A⊕0=A; A⊕1=A'; A⊕A=0; A⊕A'=1. These identities enable manual simplification — start with the most complex term and apply identities to reduce complexity.

Each Boolean operation corresponds directly to a logic gate in digital electronics: AND gate implements the · operation; OR gate implements +; NOT gate (inverter) implements '; NAND = NOT(AND); NOR = NOT(OR); XOR gate implements ⊕. Any Boolean expression can be implemented as a circuit by mapping each operation to its gate and connecting them. Boolean simplification minimizes the expression and therefore the number of gates — fewer gates mean lower cost, lower power consumption, and faster circuit operation (less propagation delay). NAND gates are functionally complete — any Boolean function can be built using only NAND gates — which is why NAND gates dominate in CMOS chip design. FPGA devices implement Boolean functions using look-up tables (LUTs) — essentially programmed truth tables — which is why Boolean minimization is central to FPGA design flow.

Sources & Methodology

Roth, C.H., Kinney, L.L. (2013). Fundamentals of Logic Design, 7th ed. Cengage. Mano, M.M., Ciletti, M.D. (2013). Digital Design with RTL Design, VHDL, and Verilog, 5th ed. Pearson.

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How It Works

Understanding Your Results

Worked Examples

Both True (A=1, B=1)

Inputs

Results

and result1

or result1

xor result0

not a0

nand result0

nor result0

When both inputs are true: AND=1 (both true), OR=1 (at least one true), XOR=0 (inputs match), NOT A=0, NAND=0 (inverted AND), NOR=0 (inverted OR).

One True (A=1, B=0)

Inputs

Results

and result0

or result1

xor result1

not a0

nand result1

nor result0

When inputs differ: AND=0 (not both true), OR=1 (at least one true), XOR=1 (inputs differ), NAND=1 (inverted AND=0), NOR=0 (inverted OR=1).

Frequently Asked Questions